Radio Side-Channels in Mixed-Signal Chips
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Updated
Jun 25, 2025 - C
Radio Side-Channels in Mixed-Signal Chips
Microarchitectural attack development frameworks for prototyping attacks in native code (C, C++, ASM) and in the browser
TCP ISN CPU Information Leak Protection. TCP Initial Sequence Numbers Randomization to prevent TCP ISN based CPU Information Leaks.
GitHub (mirror) repository for the Mastik toolkit, written by Yuval Yarom https://cs.adelaide.edu.au/~yval/Mastik/
Open-source release of "Last-Level Cache Side-Channel Attacks Are Feasible in the Modern Public Cloud" (ASPLOS '24)
Python Elliptic Curve Side-Channel Analysis toolkit (codegen package).
Simple implementation of a CPA Attack on the AES-128 using Matlab.
A C-based Kernel / CPU side-channel exploit development library.
Firmware for LEIA SOLO device
Detecting Faults in Inner-Product Masking Scheme - IPM-FD: IPM with Fault Detection
Poking around Intel Data Streaming Accelerator (DSA)
On-demand Time Blurring for Side-channel Mitigation
Project using the post-quantum crypto library for the ARM Cortex-M4 pqm4 to reproduce the Kyber CPA in https://eprint.iacr.org/2021/1311
Research project about Spectre attack on XiangShan open-source RISC-V processor
Create simulated traces for demonstrating basic DPA/CPA
Proof of concept code for the Spectre CPU exploit.
A bare metal environment for the Nexus 6 with implementations for several cache side-channel attacks.
This repository contains two proof-of-concept of cache side-channel attack (i.e., Flush+Reload)
Contains the code developed in smart card lab
Artifact of "DSASSASSIN: Cross-VM Side-Channel Attacks by Exploiting Intel Data Streaming Accelerator" (HPCA '26)
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