[https://nvbugs/6428094][chore] Unwaive DeepSeekV3Lite tp2pp2 test

[cascade812]

Dev Engineer Review

• Removed the DeepSeekV3Lite TP2/PP2 BF16 4-GPU skip entry from tests/integration/test_lists/waives.txt.
• The change matches the objective to unwaive the test for NVIDIA bug 6428094.
• The change has no API, performance, or error-handling impact.
• The test-list change is limited to the intended entry.

QA Engineer Review

• Modified tests/integration/test_lists/waives.txt.
• Removed the DeepSeekV3Lite TP2/PP2 BF16 4-GPU entry with mtp_nextn=0, no attention DP, CUDA graphs, overlap scheduling, or Torch compilation.
• No test-db/ or qa/ files were modified.
• Verdict: needs follow-up because CBTS coverage data is unavailable.

Description

Test Coverage

PR Checklist

Please review the following before submitting your PR:

• PR description clearly explains what and why. If using CodeRabbit's summary, please make sure it makes sense.

• PR Follows TRT-LLM CODING GUIDELINES to the best of your knowledge.

• Test cases are provided for new code paths (see test instructions)

• If PR introduces API changes, an appropriate PR label is added - either api-compatible or api-breaking. For api-breaking, include BREAKING in the PR title.

• Any new dependencies have been scanned for license and vulnerabilities

• CODEOWNERS updated if ownership changes

• Documentation updated as needed

• Update tava architecture diagram if there is a significant design change in PR.

• The reviewers assigned automatically/manually are appropriate for the PR.

• Please check this after reviewing the above items as appropriate for this PR.

GitHub Bot Help

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[coderabbitai]

Walkthrough

The integration waiver list no longer skips the DeepSeekV3Lite TP2/PP2 BF16 4-GPU test with mtp_nextn=0 and the specified disabled execution options.

Changes

DeepSeekV3Lite integration test

Layer / File(s)	Summary
Remove DeepSeekV3Lite test waiver tests/integration/test_lists/waives.txt	Removes the skip entry and associated NVBUG reference for the specified test configuration.

Estimated code review effort: 1 (Trivial) | ~2 minutes

Possibly related PRs

• NVIDIA/TensorRT-LLM#15343: Removes a related DeepSeekV3Lite integration test waiver from the same waiver list.
• NVIDIA/TensorRT-LLM#16975: Removes the same mtp_nextn=0 DeepSeekV3Lite BF16 waiver pattern.

Suggested reviewers: brnguyen2, qijune

🚥 Pre-merge checks | ✅ 4 | ❌ 1

❌ Failed checks (1 warning)

Check name	Status	Explanation	Resolution
Description check	⚠️ Warning	The description includes the required headings and checklist but leaves the Description and Test Coverage sections empty.	Add a short explanation of the issue and solution, and list the relevant test or validation coverage.

✅ Passed checks (4 passed)

Check name	Status	Explanation
Docstring Coverage	✅ Passed	No functions found in the changed files to evaluate docstring coverage. Skipping docstring coverage check.
Linked Issues check	✅ Passed	Check skipped because no linked issues were found for this pull request.
Out of Scope Changes check	✅ Passed	Check skipped because no linked issues were found for this pull request.
Title check	✅ Passed	The title clearly identifies the NVIDIA bug, chore type, and DeepSeekV3Lite tp2pp2 test unwaiver.

✨ Finishing Touches 💡 1

🛠️ Fix failing CI checks 💡

• Create stacked PR
• Commit on current branch

🧪 Generate unit tests (beta)

• Create PR with unit tests

---

_{Comment @coderabbitai help to get the list of available commands.}

[BowenFu]

Waiver removal only. The test sits in a post_merge block (l0_dgx_h200.yml:112), so the green pre-merge L0 here is not coverage for it — worth a /bot run --extra-stage "DGX_H200-4_GPUs-PyTorch-Post-Merge-1" before merge. Not blocking: nvbugs/6428094 has two independent non-repros on 4xH200 (repair-bot 07-09, engineer 07-31) against a single post-merge occurrence.

[mzweilz]

Please make sure the unwaived test does pass before merge.

[cascade812]

/bot run --stage-list "DGX_H200-4_GPUs-PyTorch-Post-Merge-1"

[tensorrt-cicd]

PR_Github #63509 [ run ] triggered by Bot. Commit: 43f33b5 Link to invocation

[cascade812]

/bot run --stage-list "DGX_H200-4_GPUs-PyTorch-Post-Merge-1"

[tensorrt-cicd]

PR_Github #63805 [ run ] triggered by Bot. Commit: 43f33b5 Link to invocation

[tensorrt-cicd]

PR_Github #63509 [ run ] completed with state ABORTED. Commit: 43f33b5

Link to invocation

[tensorrt-cicd]

PR_Github #63805 [ run ] completed with state ABORTED. Commit: 43f33b5

Link to invocation

[cascade812]

/bot run --stage-list "DGX_H200-4_GPUs-PyTorch-Post-Merge-1"

[tensorrt-cicd]

PR_Github #64120 [ run ] triggered by Bot. Commit: 43f33b5 Link to invocation

[tensorrt-cicd]

PR_Github #64120 [ run ] completed with state FAILURE. Commit: 43f33b5
/LLM/main/L0_MergeRequest_PR pipeline #52043 (Partly Tested) completed with status: 'FAILURE'

CI Report

⚠️ Action Required:

• Please check the failed tests and fix your PR
• If you cannot view the failures, ask the CI triggerer to share details
• Once fixed, request an NVIDIA team member to trigger CI again

CI Agent Failure Analysis

Link to invocation

[cascade812]

/bot run --stage-list "DGX_H200-4_GPUs-PyTorch-Post-Merge-1"

[tensorrt-cicd]

PR_Github #64134 [ run ] triggered by Bot. Commit: 43f33b5 Link to invocation

[tensorrt-cicd]

PR_Github #64134 [ run ] completed with state SUCCESS. Commit: 43f33b5
/LLM/main/L0_MergeRequest_PR pipeline #52054 (Partly Tested) completed with status: 'SUCCESS'

CI Report

Link to invocation

[cascade812]

/bot skip --comment "unwaived test has completed successfully"

[tensorrt-cicd]

PR_Github #64191 [ skip ] triggered by Bot. Commit: 43f33b5 Link to invocation

[tensorrt-cicd]

PR_Github #64191 [ skip ] completed with state SUCCESS. Commit: 43f33b5
Skipping testing for commit 43f33b5

Link to invocation