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Add FastRoute4-lefdef
Add ioplacer
tspyrou
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Sep 10, 2020
…pitch [FastRoute] Add command to set layer pitch
openroadie
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Oct 15, 2022
…TCL/python regressions work now (fail after The-OpenROAD-Project#7 due to a different issue) Signed-off-by: Harsh Vardhan <openroad@chez-vardhan.com>
gudeh
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Sep 29, 2025
…rivate/place-even-only dpl: disallow using odd sites
oharboe
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May 6, 2026
…message 1. Bazel test detail (The-OpenROAD-Project#7). The actual stderr (e.g. `AssertionError: 20 != 19`) lives in a Bazel `==================== Test output for <target>:` block — usually thousands of lines *before* the FAILED summary row in the same log. Restructure the parser to: - record FAILED summary rows into a per-target dict (collapses re-runs from `--keep_going`); - buffer Test-output block lines unconditionally as we see them, so blocks that precede their FAILED row aren't dropped; - use a length-78+ `=` rule as the block end (Bazel's closing fence is 80 wide; the unittest framework's internal 70-wide separator no longer terminates capture early). PR The-OpenROAD-Project#10287 dogfood: `//src/odb/test:odb_man_tcl_check` finding now carries `AssertionError: 20 != 19 : ./src/odb: help count (20) != readme count (19)` in its detail / AI directive. 2. Per-finding log URL (The-OpenROAD-Project#11). cli._scan_check threads `check.details_url` into every emitted finding; render_markdown appends "Full log: <url>." to each item in the AI directive. 3. "Couldn't extract" message (The-OpenROAD-Project#10). When the discovery layer reports N failing checks but no parser produced a finding, the table now says "Found N failing check(s) but couldn't extract any actionable findings — see <urls>" instead of an empty screen. `discover_findings` returns `(findings, failing_check_urls)` so the renderer can show the URL list. fix_main.py + 4 unit tests updated for the new tuple shape. Tests added/updated: - test_bazel_test: 3 new cases covering block-before-summary, block-truncation, no-block-fallback, plus the existing assertion cases. - test_render_table: empty-with-failing-urls case. - test_cli, test_fix_runs_recipes: updated stubs for tuple return. 30/30 Bazel tests pass. Final 10-PR dogfood survey (the same set used to motivate P0): - All 10 PRs produce useful output. - PR The-OpenROAD-Project#10287's bazel_test_fail finding now contains the actual `AssertionError`. - PR The-OpenROAD-Project#10288's purged-build case shows a `log_unavailable` info finding alongside the 5 reviewable Gemini comments on its diff. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
RamboJHB
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May 8, 2026
Number every PG-DRC code change in the order data flows from the user-facing Tcl flag down to the FlexGC checks, so a reader can grep for [PG-DRC #1] .. [PG-DRC The-OpenROAD-Project#11] and walk the chain end to end: #1 TritonRoute.tcl -- parse -check_pg_nets The-OpenROAD-Project#2 TritonRoute.i -- SWIG bridge The-OpenROAD-Project#3 TritonRoute.h -- public API param The-OpenROAD-Project#4 TritonRoute.cpp -- write router_cfg_->CHECK_PG_NETS The-OpenROAD-Project#5 global.h -- RouterConfiguration field The-OpenROAD-Project#6 serialization.h -- distributed-worker serialization The-OpenROAD-Project#7 frRegionQuery.cpp -- feed PG snets to drObjs rtree The-OpenROAD-Project#8 FlexGC_init.cpp -- skip PG in fixed-obstacle pass The-OpenROAD-Project#9 FlexGC_cut.cpp -- gate via-table supply-skip The-OpenROAD-Project#10 drc_test_pg.tcl -- end-to-end smoke regression The-OpenROAD-Project#11 CMakeLists.txt / BUILD -- register test in both build systems Also document why FlexGCWorker::Impl::checkCutSpacing_spc() is deliberately left alone: that skip honors LEF SAMENETPGONLY and must keep exempting same-PG-net cuts even when PG DRC is on. Signed-off-by: Claude <noreply@anthropic.com>
RamboJHB
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May 8, 2026
…cfg field
Previous version stashed CHECK_PG_NETS in RouterConfiguration so every
downstream stage could read it via router_cfg_. That made the flag a
hidden global: it lived for the lifetime of the router, would persist
across calls, and forced a serialization entry for distributed
workers. Refactor to plumb the bool as an explicit parameter end to
end so PG checking happens only when, and exactly where, the user
asks for it.
- Drop RouterConfiguration::CHECK_PG_NETS and its serialize line.
- frRegionQuery::initDRObj gains an include_pg_nets bool (default
false). All routing/repair callers keep the default; only
TritonRoute::checkDRC passes true when -check_pg_nets is set.
- FlexGCWorker gets setCheckPgNets(bool) + Impl::checkPgNets_;
FlexGC_init.cpp / FlexGC_cut.cpp read the worker member instead
of router_cfg_.
- TritonRoute::getDRCMarkers takes the bool and forwards it to
each FlexGCWorker before init.
- TritonRoute::checkDRC body re-runs initDRObj(true) only when the
flag is on (idempotent rebuild) and forwards the bool to
getDRCMarkers; default check_drc and the routing flow are
bit-identical to before.
Renumber [PG-DRC #N] markers to follow the new linear chain (#1..The-OpenROAD-Project#10):
#1 Tcl flag parse
The-OpenROAD-Project#2 SWIG bridge
The-OpenROAD-Project#3 TritonRoute::checkDRC declaration
The-OpenROAD-Project#4 TritonRoute::checkDRC body -> initDRObj(true)
The-OpenROAD-Project#5 frRegionQuery::Impl::initDRObj feeds PG to drObjs
The-OpenROAD-Project#6 TritonRoute::getDRCMarkers + FlexGCWorker::setCheckPgNets / member
The-OpenROAD-Project#7 FlexGCWorker::Impl::initDesign obstacle-pass skip
The-OpenROAD-Project#8 FlexGCWorker::Impl::checkMetalWidthViaTable supply-skip gate
The-OpenROAD-Project#9 drc_test_pg.tcl smoke regression
The-OpenROAD-Project#10 CMakeLists.txt / BUILD registration
Signed-off-by: Claude <noreply@anthropic.com>
RamboJHB
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May 9, 2026
… all getSNets() returns every DEF SPECIALNETS entry. io::Parser::addNet only enforces supply => special; the reverse is not true. Pre-routed clock nets and any designer-tagged special signal net land in frBlock::snets_ alongside VDD/VSS, so the strict PG-only ingestion at [PG-DRC The-OpenROAD-Project#7] was dragging non-supply specials into FlexGC as PG-owned shapes. Filter the SNets loop with frNet::getType().isSupply() -- the same predicate FlexGC's own isPG() helper uses in FlexGC_main.cpp. Non- supply specials remain as fixed obstacles via the `shapes` rtree (populated by frRegionQuery::Impl::init()), so PG-vs-clock-strap and PG-vs-special-signal still fire correctly with the PG strap as the violation owner. Signed-off-by: Claude <noreply@anthropic.com>
RamboJHB
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May 9, 2026
When the user reports "same output with -check_pg_nets on", we have no visibility into where the chain is failing. Wire a small set of gated trace prints that fire only when -check_pg_nets is set, and drop a per-rule comment block at every spec rule's check entry function so the spec table maps 1:1 onto the source. Trace points (chain order, all gated on CHECK_PG_NETS): #1 (TritonRoute.tcl) Tcl proc parsed flag, forwarding to SWIG The-OpenROAD-Project#4 (TritonRoute.cpp) checkDRC entered with the flag The-OpenROAD-Project#7 (frRegionQuery.cpp) initDRObj summary: how many supply nets ingested into drObjs, how many non-supply specials skipped (left as obstacles), how many signal nets skipped entirely The-OpenROAD-Project#8 (FlexGC_init.cpp) FlexGC obstacle pass: how many shapes loaded as fixed obstacles, how many supply shapes deferred to the drObj pass The-OpenROAD-Project#10 (TritonRoute.cpp) output filter: markers in / kept / dropped RULE-N (FlexGC.cpp addMarker) every emitted marker is classified into spec rule #1..The-OpenROAD-Project#4 by frConstraintTypeEnum and printed with layer, bbox, and whether any src is a supply owner Per-rule comment annotations (no per-rect prints; addMarker handles those centrally to avoid log spam): RULE-1 PG-PG spacing checkMetalSpacing_main (FlexGC_main.cpp) RULE-2 Blockage / keepout checkMetalSpacing_short_obs (FlexGC_main), checKeepOutZone_main (FlexGC_cut) RULE-3 Width / grid checkMetalShape_minWidth, checkMetalShape_offGrid (FlexGC_main.cpp) RULE-4 Via physical checkMetalWidthViaTable, checkLef58Enclosure_main (FlexGC_cut.cpp) Default check_drc (no flag) emits zero new output and the routing flow is byte-identical. To diagnose "same result": rebuild and run check_drc -check_pg_nets; the missing [PG-DRC #N] trace identifies the broken link. Signed-off-by: Claude <noreply@anthropic.com>
RamboJHB
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May 11, 2026
…inventory User asked for a per-PG-net debug print at the The-OpenROAD-Project#9 supply-skip gate in FlexGCWorker::Impl::checkMetalWidthViaTable (FlexGC_cut.cpp). Add it. Also add a once-per-worker [PG-DRC INV] dump at the end of FlexGCWorker::Impl::init that classifies every gcNet by owner type and flags any signal frNet that has routed polygons. Under strict ingestion (The-OpenROAD-Project#7) a signal gcNet should be pure pins -- only fixed polygons. If a signal frNet has a routed polygon set, the inventory prints a [PG-DRC INV] LEAK line naming the net, which directly identifies how signal-net routed wires reached FlexGC despite the The-OpenROAD-Project#7 strict gate. Why this matters: user's run shows marker srcs with two signal-net frNets (sigType=SIGNAL), which should not happen because spacing checks early-return when both rects are fixed. The leak detector will tell us whether signal frNets have any routed polygons (which means drObjs got contaminated upstream) or not (which means the marker's "non-fixed" rect comes from a different source we haven't considered yet). Signed-off-by: Claude <noreply@anthropic.com>
RamboJHB
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May 11, 2026
non-supply spacing checks when -check_pg_nets is on [PG-DRC INV] confirmed a real leak: with strict drObj ingestion (The-OpenROAD-Project#7 shows signal_nets=428 skipped), FlexGCWorker still ends up with signal frNet gcNets that have non-empty routePolygons. That causes signal-vs-signal spacing markers to fire (the early-return on isFixed && isFixed misses them), and the output filter then drops every marker because no src is a supply owner -- leaving the report file empty. Until we hunt down which path is putting signal-net routed geometry into FlexGC under strict mode, install two defensive band-aids: - gcNet::clearRoutePolygonsOnly() drops routePolygons / route- Rectangles / NDR aux data without touching fixedPolygons or already-built pins. - FlexGCWorker::Impl::init invokes the above on every non-supply gcNet before initNets() runs, after both initDesign and initNetsFromDesign have populated polygons. Reports per-worker count via [PG-DRC SAFE]. - FlexGCWorker::Impl::checkMetalSpacing_main short-circuits when neither rect's gcNet owner is a supply (frNet POWER/GROUND, frBTerm supply, frInstTerm supply). A genuine PG-DRC marker always has at least one supply src; signal-vs-signal pairs are never a PG concern. Default check_drc (flag off) is unchanged. Reporting cleanup will follow in a separate commit after the underlying leak is located. Signed-off-by: Claude <noreply@anthropic.com>
RamboJHB
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May 12, 2026
getNet() is the single funnel every shape passes through to obtain its gcNet (pins from the shapes rtree, routed wires from drObjs, vias, patch wires -- all of them). Putting the PG filter here catches any leak path regardless of where it originated, which the earlier per-rtree filters (The-OpenROAD-Project#7, The-OpenROAD-Project#8, #8b) apparently did not -- [PG-DRC INV] still reported signal frNet gcNets with routed polygons. Change: - getNet(frBlockObject*): when router_cfg_->CHECK_PG_NETS is on and the resolved owner is a non-supply frNet, return nullptr instead of creating/returning a gcNet. - initObj: skip the shape if getNet returns nullptr. - initRouteObj: return nullptr if getNet returns nullptr; the patch-wire callsite in initNetsFromDesign skips on nullptr. Effect under -check_pg_nets: no signal-net geometry of any kind enters FlexGC, so [PG-DRC INV] should report signal_frNet=0 / routed_leak=0 and no [PG-DRC INV] LEAK lines. PG-vs-blockage still works (blockage owner is frBlockage, not frNet); PG-vs-signal-pin coverage is dropped (accepted -- strict PG-only per user direction). Default check_drc (flag off) is unchanged: owner is never a problem because CHECK_PG_NETS gates the whole branch. Signed-off-by: Claude <noreply@anthropic.com>
RamboJHB
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May 15, 2026
… rtree under -check_pg_nets
Phase 7 [PG-DRC INV] traces have confirmed two things:
1. routePolygons_ on signal frNet gcNets is empty (no leak from
drObjs ingestion -- The-OpenROAD-Project#7 / #8b are working correctly).
2. RULE-1 markers still fire between two would-be-fixed shapes
(instBlockage + signal pin), which means a gcRect on a signal
frNet gcNet is getting setFixed(false) inside
initNet_pins_maxRectangles_helper despite all source polygons
being fixed. This is a boost.polygon max-rect decomposition
mismatch after union; it has nothing to do with the data
ingestion path.
Per user direction, sidestep the FlexGC internal bug by keeping
signal-net pin / block-term geometry out of the rtree FlexGC reads
in the first place. New filter at frRegionQuery::Impl::init() (the
`shapes` rtree builder):
- When router_cfg->CHECK_PG_NETS is on, skip any frInstTerm whose
connected net is non-supply, and skip any frBTerm whose type is
non-supply.
- Floating supply pins (no net) are unaffected -- they go through
the fakeVDD/fakeVSS path.
- SNets / blockages / inst blockages untouched.
Result under -check_pg_nets: the FlexGC obstacle pass sees only
supply pins + blockages + SNet geometry. No frInstTerm or frBTerm
attached to a signal frNet ever calls getNet() inside FlexGC, so no
signal frNet gcNet is ever constructed, so the buggy
initNet_pins_maxRectangles_helper code path never runs on signal
nets, so no spurious signal-vs-anything markers can be emitted.
Pairs with [PG-DRC The-OpenROAD-Project#7] (signal nets out of drObjs rtree). Together
the two gates keep every signal-net object out of every region-query
path that check_drc touches.
Default check_drc (flag off) is unchanged: the filter lambda
short-circuits on !CHECK_PG_NETS.
Signed-off-by: Claude <noreply@anthropic.com>
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