[https://nvbugs/6463822][fix] Fix LTX2 CUDA graph test leak issue by yibinl-nvidia · Pull Request #16775 · NVIDIA/TensorRT-LLM

yibinl-nvidia · 2026-07-23T04:45:42Z

Dev Engineer Review

Updated _generate_ltx2_cuda_graph_trtllm_backend_video to delete visual_gen and invoke _cleanup_cuda() during teardown.
Cleanup is placed in finally, ensuring execution on both success and failure after backend shutdown.
No API, configuration, or test-list changes. The change is small and consistent with deterministic CUDA resource cleanup.

QA Engineer Review

Modified test function: _generate_ltx2_cuda_graph_trtllm_backend_video.
No test-list files were modified; CI coverage mapping could not be confirmed from the available changes.
Verdict: needs follow-up.

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Signed-off-by: Yibin Li <109242046+yibinl-nvidia@users.noreply.github.com>

yibinl-nvidia · 2026-07-23T17:11:11Z

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yibinl-nvidia · 2026-07-23T17:18:54Z

/bot run --extra-stage "DGX_B200-PyTorch-Post-Merge-2, examples/visual_gen/test_visual_gen.py::test_ltx2_cuda_graph_trtllm_backend"

tensorrt-cicd · 2026-07-23T17:26:33Z

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PR_Github #61350 [ run ] completed with state FAILURE. Commit: e99490a
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yibinl-nvidia · 2026-07-23T19:18:09Z

/bot run --extra-stage "DGX_B200-PyTorch-Post-Merge-2, examples/visual_gen/test_visual_gen.py::test_ltx2_cuda_graph_trtllm_backend" --disable-fail-fast

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yibinl-nvidia · 2026-07-23T21:06:16Z

/bot run --extra-stage "DGX_B200-PyTorch-Post-Merge-2" --disable-fail-fast

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yibinl-nvidia · 2026-07-24T03:52:49Z

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yibinl-nvidia · 2026-07-24T14:02:48Z

/bot run --extra-stage "DGX_B200-PyTorch-Post-Merge-2" --disable-fail-fast

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yibinl-nvidia · 2026-07-24T16:55:33Z

/bot kill

tensorrt-cicd · 2026-07-24T16:58:55Z

PR_Github #61582 [ run ] completed with state FAILURE. Commit: e99490a
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yibinl-nvidia · 2026-07-24T17:12:56Z

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coderabbitai · 2026-07-24T18:01:35Z

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tests/integration/defs/examples/visual_gen/test_visual_gen.py

Walkthrough

The TRT-LLM VisualGen CUDA-graph test helper now deletes the backend object and runs CUDA cleanup after shutdown, including when generation exits through the finally path.

Changes

VisualGen CUDA cleanup

Layer / File(s)	Summary
Release resources after generation `tests/integration/defs/examples/visual_gen/test_visual_gen.py`	The cleanup path deletes `visual_gen` and calls `_cleanup_cuda()` after `visual_gen.shutdown()`.

Estimated code review effort: 1 (Trivial) | ~2 minutes

Suggested reviewers: chang-l

🚥 Pre-merge checks | ✅ 4 | ❌ 1

❌ Failed checks (1 warning)

Check name	Status	Explanation	Resolution
Description check	⚠️ Warning	The description is mostly the template with no filled-in issue/solution or test coverage details.	Fill in the Description and Test Coverage sections with the problem, the fix, and the relevant test(s); keep the checklist if desired.

✅ Passed checks (4 passed)

Check name	Status	Explanation
Title check	✅ Passed	The title matches the change: a fix for the LTX2 CUDA graph test leak and includes the NVBugs ID and type.
Docstring Coverage	✅ Passed	No functions found in the changed files to evaluate docstring coverage. Skipping docstring coverage check.
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schetlur-nv

lgtm

yibinl-nvidia · 2026-07-24T19:57:01Z

/bot run --stage-list "DGX_B200-PyTorch-Post-Merge-2"

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BowenFu

LGTM — test-only cleanup (del + _cleanup_cuda in finally) to release CUDA state after LTX2 CUDA-graph test; no product/default behavior impact.

…IDIA#16775) Signed-off-by: Yibin Li <109242046+yibinl-nvidia@users.noreply.github.com>

…nnahz/dep-1083-port-flashinfer-stable-va-lifecycle-for-native-all-reduce * 'main' of https://github.com/NVIDIA/TensorRT-LLM: (54 commits) [NVIDIA#15673][fix] Enable CUDA core fast path for SM89/SM120/SM121 (NVIDIA#12705) [None][test] Adjust timeout cases in QA perf test (NVIDIA#16894) [https://nvbugs/6157892][fix] Mistral format refactor (NVIDIA#15123) [None][feat] Add kimi_k2/glm_5 grouped routing and fused router to bench_moe (NVIDIA#16830) [https://nvbugs/6501376][fix] Test-only fix — drop the `if hidden_size % 2 != 0: with pytest.raises(...)`… (NVIDIA#16844) [TRTLLM-13642][feat] Add perf sanity tests for Llama-3.1-8B and Gemma-3-1B and verify cache transceiver V2 support (NVIDIA#16355) [https://nvbugs/6433376][fix] Update the Dense test to mirror the MoE sibling — assert `bfloat16` under… (NVIDIA#16203) [None][fix] Resolve NVFP4 mixed-precision base layers for the DSpark draft (NVIDIA#16831) [https://nvbugs/6479324][test] Remove waiver for fixed qwen3_5_4b_fp8_stress disaggregated stress test (NVIDIA#16878) [https://nvbugs/6507109][infra] Split slow DGX B300 attention unit tests (NVIDIA#16838) [None][infra] Waive 21 failed cases for main in post-merge 2862 (NVIDIA#16882) [None][perf] prepare_inputs: avoid O(seq_len) get_tokens(0) marshalling on the host (NVIDIA#16791) [None][perf] Optimize Blackwell fused MHC half-MMA kernel (NVIDIA#16799) [None][infra] Auto-update test durations from OpenSearch (last 7 days) [None][perf] Skip DeepGEMM clean_logits in DSA indexer prefill on custom top-k path (NVIDIA#16789) [None][feat] Support DeepSeek-V4 in layer_wise_benchmarks (NVIDIA#16774) [https://nvbugs/6465993][fix] use attention cache dtype for disaggregated transfer (NVIDIA#16505) [https://nvbugs/6463822][fix] Fix LTX2 CUDA graph test leak issue (NVIDIA#16775) [https://nvbugs/5948435][chore] Unwaive DeepSeekV3Lite test_nvfp4_4gpus CUTLASS ep4 fp8kv on RTXPro6000D (NVIDIA#16621) [TRTLLM-14417][fix] Exclude ADP/cuda-graph dummy requests from speculative-decode acceptance stats (NVIDIA#16571) ... Signed-off-by: Hannah Zhang <hannahz@nvidia.com>

…nnahz/dep-1082-shared-mnnvl-moe-lifecycle * 'main' of https://github.com/NVIDIA/TensorRT-LLM: (142 commits) [NVIDIA#15673][fix] Enable CUDA core fast path for SM89/SM120/SM121 (NVIDIA#12705) [None][test] Adjust timeout cases in QA perf test (NVIDIA#16894) [https://nvbugs/6157892][fix] Mistral format refactor (NVIDIA#15123) [None][feat] Add kimi_k2/glm_5 grouped routing and fused router to bench_moe (NVIDIA#16830) [https://nvbugs/6501376][fix] Test-only fix — drop the `if hidden_size % 2 != 0: with pytest.raises(...)`… (NVIDIA#16844) [TRTLLM-13642][feat] Add perf sanity tests for Llama-3.1-8B and Gemma-3-1B and verify cache transceiver V2 support (NVIDIA#16355) [https://nvbugs/6433376][fix] Update the Dense test to mirror the MoE sibling — assert `bfloat16` under… (NVIDIA#16203) [None][fix] Resolve NVFP4 mixed-precision base layers for the DSpark draft (NVIDIA#16831) [https://nvbugs/6479324][test] Remove waiver for fixed qwen3_5_4b_fp8_stress disaggregated stress test (NVIDIA#16878) [https://nvbugs/6507109][infra] Split slow DGX B300 attention unit tests (NVIDIA#16838) [None][infra] Waive 21 failed cases for main in post-merge 2862 (NVIDIA#16882) [None][perf] prepare_inputs: avoid O(seq_len) get_tokens(0) marshalling on the host (NVIDIA#16791) [None][perf] Optimize Blackwell fused MHC half-MMA kernel (NVIDIA#16799) [None][infra] Auto-update test durations from OpenSearch (last 7 days) [None][perf] Skip DeepGEMM clean_logits in DSA indexer prefill on custom top-k path (NVIDIA#16789) [None][feat] Support DeepSeek-V4 in layer_wise_benchmarks (NVIDIA#16774) [https://nvbugs/6465993][fix] use attention cache dtype for disaggregated transfer (NVIDIA#16505) [https://nvbugs/6463822][fix] Fix LTX2 CUDA graph test leak issue (NVIDIA#16775) [https://nvbugs/5948435][chore] Unwaive DeepSeekV3Lite test_nvfp4_4gpus CUTLASS ep4 fp8kv on RTXPro6000D (NVIDIA#16621) [TRTLLM-14417][fix] Exclude ADP/cuda-graph dummy requests from speculative-decode acceptance stats (NVIDIA#16571) ... Signed-off-by: Hannah Zhang <hannahz@nvidia.com>

Fix LTX2 CUDA graph test teardown leak

e99490a

Signed-off-by: Yibin Li <109242046+yibinl-nvidia@users.noreply.github.com>

github-actions Bot assigned yibinl-nvidia Jul 23, 2026

yibinl-nvidia marked this pull request as ready for review July 24, 2026 17:57

yibinl-nvidia requested review from a team as code owners July 24, 2026 17:57

yibinl-nvidia requested review from BowenFu, QiJune and crazydemo July 24, 2026 17:57

yibinl-nvidia requested review from jieli-matrix, tburt-nv and yuanjingx87 July 24, 2026 17:57

schetlur-nv approved these changes Jul 24, 2026

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yuanjingx87 approved these changes Jul 24, 2026

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schetlur-nv added the ci: post-merge approved Approved by TRT-LLM CI approvers for broad post-merge CI requests label Jul 24, 2026

BowenFu approved these changes Jul 25, 2026

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juney-nvidia removed the ci: post-merge approved Approved by TRT-LLM CI approvers for broad post-merge CI requests label Jul 25, 2026

juney-nvidia merged commit bfb0fca into NVIDIA:main Jul 25, 2026
18 of 19 checks passed

yuanjingx87 pushed a commit to yuanjingx87/TensorRT-LLM that referenced this pull request Jul 26, 2026

[https://nvbugs/6463822][fix] Fix LTX2 CUDA graph test leak issue (NV…

5d3e912

…IDIA#16775) Signed-off-by: Yibin Li <109242046+yibinl-nvidia@users.noreply.github.com>

yibinl-nvidia deleted the dev-yibinl-bug6463822-ltx2-cudagraph-leak branch July 27, 2026 03:28

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