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[https://nvbugs/6479324][test] Remove waiver for fixed qwen3_5_4b_fp8_stress disaggregated stress test - #16878

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VALLIS-NERIA merged 1 commit into
NVIDIA:mainfrom
VALLIS-NERIA:agent/nvbug-6479324-remove-waiver
Jul 27, 2026
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[https://nvbugs/6479324][test] Remove waiver for fixed qwen3_5_4b_fp8_stress disaggregated stress test#16878
VALLIS-NERIA merged 1 commit into
NVIDIA:mainfrom
VALLIS-NERIA:agent/nvbug-6479324-remove-waiver

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@VALLIS-NERIA VALLIS-NERIA commented Jul 26, 2026

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Description

NVBug 6479324 has been fixed on main, so its test waiver is no longer needed. This PR removes the stale waiver entry for:

full:H100/disaggregated/test_disaggregated.py::test_disaggregated_stress_test[input8k-output1k-conc512-qwen3_5_4b_fp8_stress] SKIP (https://nvbugs/6479324)

Test Coverage

tests/integration/defs/disaggregated/test_disaggregated.py::test_disaggregated_stress_test[input8k-output1k-conc512-qwen3_5_4b_fp8_stress] is now re-enabled and will run in CI.

PR Checklist

  • PR title follows [NVBUG][type] description format
  • Only removes a stale waiver; no source behavior change

🤖 Generated with Claude Code

Dev Engineer Review

  • Removed the stale NVBug 6479324 waiver for the fixed H100 disaggregated qwen3_5_4b_fp8_stress test.
  • The test-list format and scope are consistent; no source behavior or public APIs changed.
  • No duplicate or unintended entries were introduced.

QA Engineer Review

  • Modified tests/integration/test_lists/waives.txt: removed one waived test entry.
  • No test-db/ or qa/ files were modified.
  • Verdict: needs follow-up pending CBTS coverage data.

…_stress test (By Agent)

Signed-off-by: Xiwen Yu <13230610+VALLIS-NERIA@users.noreply.github.com>
@VALLIS-NERIA

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/bot run

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coderabbitai Bot commented Jul 26, 2026

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Review Change Stack

No actionable comments were generated in the recent review. 🎉

ℹ️ Recent review info
⚙️ Run configuration

Configuration used: Path: .coderabbit.yaml

Review profile: CHILL

Plan: Enterprise

Run ID: c60c0b74-d245-4150-90a8-05f7646c29d7

📥 Commits

Reviewing files that changed from the base of the PR and between 1562a07 and 3f8172f.

📒 Files selected for processing (1)
  • tests/integration/test_lists/waives.txt
💤 Files with no reviewable changes (1)
  • tests/integration/test_lists/waives.txt

Walkthrough

The integration waiver list removes the skipped entry for the H100 disaggregated Qwen3.5 4B FP8 stress test, allowing that test to run under the integration test suite.

Changes

Integration waiver update

Layer / File(s) Summary
Remove disaggregated stress-test waiver
tests/integration/test_lists/waives.txt
Deletes the waiver entry for the specified H100 disaggregated stress test.

Estimated code review effort: 1 (Trivial) | ~2 minutes

Possibly related PRs

Suggested reviewers: bowenfu

🚥 Pre-merge checks | ✅ 5
✅ Passed checks (5 passed)
Check name Status Explanation
Title check ✅ Passed The title clearly states the main change: removing a waiver for the fixed qwen3_5_4b_fp8_stress disaggregated test.
Description check ✅ Passed The description includes the required sections and clearly explains the issue, the removal, and the test coverage.
Docstring Coverage ✅ Passed No functions found in the changed files to evaluate docstring coverage. Skipping docstring coverage check.
Linked Issues check ✅ Passed Check skipped because no linked issues were found for this pull request.
Out of Scope Changes check ✅ Passed Check skipped because no linked issues were found for this pull request.
✨ Finishing Touches
🧪 Generate unit tests (beta)
  • Create PR with unit tests

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PR_Github #61743 [ run ] triggered by Bot. Commit: 3f8172f Link to invocation

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PR_Github #61743 [ run ] completed with state SUCCESS. Commit: 3f8172f
/LLM/main/L0_MergeRequest_PR pipeline #49945 completed with status: 'SUCCESS'

CI Report

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@VALLIS-NERIA
VALLIS-NERIA merged commit da39470 into NVIDIA:main Jul 27, 2026
12 checks passed
hhzhang16 added a commit to hhzhang16/TensorRT-LLM that referenced this pull request Jul 27, 2026
…nnahz/dep-1083-port-flashinfer-stable-va-lifecycle-for-native-all-reduce

* 'main' of https://github.com/NVIDIA/TensorRT-LLM: (54 commits)
  [NVIDIA#15673][fix] Enable CUDA core fast path for SM89/SM120/SM121 (NVIDIA#12705)
  [None][test] Adjust timeout cases in QA perf test (NVIDIA#16894)
  [https://nvbugs/6157892][fix] Mistral format refactor (NVIDIA#15123)
  [None][feat] Add kimi_k2/glm_5 grouped routing and fused router to bench_moe (NVIDIA#16830)
  [https://nvbugs/6501376][fix] Test-only fix — drop the `if hidden_size % 2 != 0: with pytest.raises(...)`… (NVIDIA#16844)
  [TRTLLM-13642][feat] Add perf sanity tests for Llama-3.1-8B and Gemma-3-1B and verify cache transceiver V2 support (NVIDIA#16355)
  [https://nvbugs/6433376][fix] Update the Dense test to mirror the MoE sibling — assert `bfloat16` under… (NVIDIA#16203)
  [None][fix] Resolve NVFP4 mixed-precision base layers for the DSpark draft (NVIDIA#16831)
  [https://nvbugs/6479324][test] Remove waiver for fixed qwen3_5_4b_fp8_stress disaggregated stress test (NVIDIA#16878)
  [https://nvbugs/6507109][infra] Split slow DGX B300 attention unit tests (NVIDIA#16838)
  [None][infra] Waive 21 failed cases for main in post-merge 2862 (NVIDIA#16882)
  [None][perf] prepare_inputs: avoid O(seq_len) get_tokens(0) marshalling on the host (NVIDIA#16791)
  [None][perf] Optimize Blackwell fused MHC half-MMA kernel (NVIDIA#16799)
  [None][infra] Auto-update test durations from OpenSearch (last 7 days)
  [None][perf] Skip DeepGEMM clean_logits in DSA indexer prefill on custom top-k path (NVIDIA#16789)
  [None][feat] Support DeepSeek-V4 in layer_wise_benchmarks (NVIDIA#16774)
  [https://nvbugs/6465993][fix] use attention cache dtype for disaggregated transfer (NVIDIA#16505)
  [https://nvbugs/6463822][fix] Fix LTX2 CUDA graph test leak issue (NVIDIA#16775)
  [https://nvbugs/5948435][chore] Unwaive DeepSeekV3Lite test_nvfp4_4gpus CUTLASS ep4 fp8kv on RTXPro6000D (NVIDIA#16621)
  [TRTLLM-14417][fix] Exclude ADP/cuda-graph dummy requests from speculative-decode acceptance stats (NVIDIA#16571)
  ...

Signed-off-by: Hannah Zhang <hannahz@nvidia.com>
hhzhang16 added a commit to hhzhang16/TensorRT-LLM that referenced this pull request Jul 27, 2026
…nnahz/dep-1082-shared-mnnvl-moe-lifecycle

* 'main' of https://github.com/NVIDIA/TensorRT-LLM: (142 commits)
  [NVIDIA#15673][fix] Enable CUDA core fast path for SM89/SM120/SM121 (NVIDIA#12705)
  [None][test] Adjust timeout cases in QA perf test (NVIDIA#16894)
  [https://nvbugs/6157892][fix] Mistral format refactor (NVIDIA#15123)
  [None][feat] Add kimi_k2/glm_5 grouped routing and fused router to bench_moe (NVIDIA#16830)
  [https://nvbugs/6501376][fix] Test-only fix — drop the `if hidden_size % 2 != 0: with pytest.raises(...)`… (NVIDIA#16844)
  [TRTLLM-13642][feat] Add perf sanity tests for Llama-3.1-8B and Gemma-3-1B and verify cache transceiver V2 support (NVIDIA#16355)
  [https://nvbugs/6433376][fix] Update the Dense test to mirror the MoE sibling — assert `bfloat16` under… (NVIDIA#16203)
  [None][fix] Resolve NVFP4 mixed-precision base layers for the DSpark draft (NVIDIA#16831)
  [https://nvbugs/6479324][test] Remove waiver for fixed qwen3_5_4b_fp8_stress disaggregated stress test (NVIDIA#16878)
  [https://nvbugs/6507109][infra] Split slow DGX B300 attention unit tests (NVIDIA#16838)
  [None][infra] Waive 21 failed cases for main in post-merge 2862 (NVIDIA#16882)
  [None][perf] prepare_inputs: avoid O(seq_len) get_tokens(0) marshalling on the host (NVIDIA#16791)
  [None][perf] Optimize Blackwell fused MHC half-MMA kernel (NVIDIA#16799)
  [None][infra] Auto-update test durations from OpenSearch (last 7 days)
  [None][perf] Skip DeepGEMM clean_logits in DSA indexer prefill on custom top-k path (NVIDIA#16789)
  [None][feat] Support DeepSeek-V4 in layer_wise_benchmarks (NVIDIA#16774)
  [https://nvbugs/6465993][fix] use attention cache dtype for disaggregated transfer (NVIDIA#16505)
  [https://nvbugs/6463822][fix] Fix LTX2 CUDA graph test leak issue (NVIDIA#16775)
  [https://nvbugs/5948435][chore] Unwaive DeepSeekV3Lite test_nvfp4_4gpus CUTLASS ep4 fp8kv on RTXPro6000D (NVIDIA#16621)
  [TRTLLM-14417][fix] Exclude ADP/cuda-graph dummy requests from speculative-decode acceptance stats (NVIDIA#16571)
  ...

Signed-off-by: Hannah Zhang <hannahz@nvidia.com>
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3 participants