[TRTLLM-14540][perf] Skip fp32 state round-trip in FlashInfer GDN pre…#16703
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…fill on SM100/SM103 FlashInfer's SM100/SM103 GDN prefill kernel carries the recurrent state in fp32 in TMEM regardless of the initial/output-state I/O dtype, so the adapter no longer needs to up-cast the gathered state to fp32 and down-cast the final state back. Keep the state in its native pool dtype (bf16/fp16) across the FlashInfer boundary there, halving the state bytes moved by the gather/scatter and dropping the fp32 scratch buffer. SM90/SM120, whose kernels still require fp32 state, are unchanged; the recurrent accumulation stays in fp32, so the result is numerically identical. Signed-off-by: nv-guomingz <137257613+nv-guomingz@users.noreply.github.com>
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WalkthroughThe FlashInfer chunk wrapper now selects state dtype by GPU architecture, passes it through gathered initial state, and uses it for optional state buffering. The gather helper supports configurable output dtype while defaulting to fp32. ChangesSSM state dtype handling
Estimated code review effort: 2 (Simple) | ~10 minutes Suggested reviewers: 🚥 Pre-merge checks | ✅ 5✅ Passed checks (5 passed)
✨ Finishing Touches🧪 Generate unit tests (beta)
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…nnahz/dep-1083-port-flashinfer-stable-va-lifecycle-for-native-all-reduce * 'main' of https://github.com/NVIDIA/TensorRT-LLM: (83 commits) [None][feat] Bind SourceIdentity to checkpoint artifacts (NVIDIA#16159) [None][infra] Waive 4 failed cases for main in pre-merge 49550 (NVIDIA#16798) [None][fix] Make FlashInfer sampling op wrappers opaque to Dynamo (NVIDIA#16732) [None][feat] top-k: route decode to CuTe DSL GVR top-k in e2e (NVIDIA#16420) [None][feat] Default GLM-5 to the Python KV-cache transceiver (NVIDIA#16524) [None][chore] Add NVTX ranges to per-iteration ADP sync points in PyExecutor (NVIDIA#16422) [https://nvbugs/6426850][test] Unwaive Qwen3.5 397B NVFP4 ADP4 TRTLLM test (NVIDIA#16348) [https://nvbugs/6445456][fix] Restore inplace ops for functionalization v2 (NVIDIA#16410) [None][infra] Waive 1 failed cases for main in pre-merge 49229 (NVIDIA#16786) [None][fix] Load DeepSeek V4 mixed-precision NVFP4 checkpoints (NVIDIA#16433) [None][feat] ADP conversation router: configurable least-queued placement for new conversations (NVIDIA#16294) [None][infra] Waive 1 failed cases for main in pre-merge 49424 (NVIDIA#16780) [None][infra] Waive 1 failed cases for main in pre-merge 49424 (NVIDIA#16781) [TRTLLMINF-188][infra] Require approval for PerfSanity wildcard runs (NVIDIA#16777) [TRTLLM-13969][feat] Support MiniMax M3 for Disaggregated Serving (NVIDIA#16017) [NVIDIA#11932][fix] Filter CUTLASS MoE GEMM tile configs by device shared memory on SM121 (NVIDIA#12704) [None][chore] Remove attention backend test waivers (NVIDIA#16723) [TRTLLM-14540][perf] Skip fp32 state round-trip in FlashInfer GDN pre… (NVIDIA#16703) [TRTLLM-13694][feat] Add IBDB recipe provenance and refresh configs (NVIDIA#16254) [None][infra] Preview/bump/main (NVIDIA#16758) ... Signed-off-by: Hannah Zhang <hannahz@nvidia.com>
NVIDIA#16703) Signed-off-by: nv-guomingz <137257613+nv-guomingz@users.noreply.github.com>
…fill on SM100/SM103
FlashInfer's SM100/SM103 GDN prefill kernel carries the recurrent state in fp32 in TMEM regardless of the initial/output-state I/O dtype, so the adapter no longer needs to up-cast the gathered state to fp32 and down-cast the final state back. Keep the state in its native pool dtype (bf16/fp16) across the FlashInfer boundary there, halving the state bytes moved by the gather/scatter and dropping the fp32 scratch buffer. SM90/SM120, whose kernels still require fp32 state, are unchanged; the recurrent accumulation stays in fp32, so the result is numerically identical.
Dev Engineer Review
out_dtypeparameter togather_cast_vk_to_fp32_vk, maintaining fp32 as the default for API compatibility.QA Engineer Review
No test changes.
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