[None][test] Waive 11 failed cases for main in post-merge - #14854
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Bug(s): 6059036, 6075533, 6181383, 6211191, 6211193, 6211441, 6215689, 6224636, 6224637, 6240420, 6245279, 6245317, 6245389, 6245394 Requested by: qa@nvidia.com Signed-off-by: tensorrt-cicd <90828364+tensorrt-cicd@users.noreply.github.com>
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📝 WalkthroughWalkthroughUpdated ChangesTest waiver configuration updates
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🎯 1 (Trivial) | ⏱️ ~3 minutes 🚥 Pre-merge checks | ✅ 4 | ❌ 1❌ Failed checks (1 inconclusive)
✅ Passed checks (4 passed)
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Actionable comments posted: 3
🤖 Prompt for all review comments with AI agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.
Inline comments:
In `@tests/integration/test_lists/waives.txt`:
- Line 100: The waiver removes FLASHINFER multi-GPU coverage for the test
accuracy/test_llm_api_pytorch.py::TestLlama3_1_8BInstruct::test_bfloat16_4gpus
(and the fp8kv+FLASHINFER combination), creating a coverage gap; reinstate or
replace these skips by either re-enabling the skipped test(s) for pp4 FLASHINFER
or add equivalent tests that exercise FLASHINFER on other parallel configs
(e.g., tp4 or different sharding) so FLASHINFER backend gets multi-GPU
validation, and ensure the test names
(TestLlama3_1_8BInstruct::test_bfloat16_4gpus and the fp8kv+FLASHINFER case) are
present in the test matrix and not skipped without a tracked bug reference.
- Line 67: The waivers file currently skips multiple tests where
torch_compile=True for quantized models (e.g.,
accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_nvfp4_4gpus[...torch_compile=True],
the Llama3_1_8BInstruct and Llama3_3_70BInstruct entries) without triage info;
update tests/integration/test_lists/waives.txt to consolidate these
torch_compile-related waivers into a single clearly labeled section, add the
root cause or ticket reference (bug/feature ID) and one of: planned ETA if work
is active, explicit "unsupported" note if not supported, or a temporary waiver
expiration date if low priority, and include the exact test identifiers (the
three failing test names) and an owner assigned for follow-up so QA knows
whether/when to re-enable them.
- Line 47: The waiver entry grouping NVBug 6211191 covers multiple PP4 test
variants that do not share the same feature combination; update the waives so
NVBug 6211191 only applies to the exact failing combos (e.g.,
accuracy/test_llm_api_pytorch.py::TestDeepSeekV3Lite::test_bfloat16_4gpus[...]
and ::test_fp8_block_scales_4gpus[...] with
attention_dp=True,cuda_graph=True,overlap_scheduler=True), and split or add
distinct NVBug references for the other PP4 entries that have different flags
(e.g., ::test_nvfp4_4gpus[...] where attention_dp/cuda_graph/overlap_scheduler
are False and ::TestLlama3_1_8BInstruct::test_fp8_4gpus[...] with
fp8kv=True/attn_backend=FLASHINFER); ensure each waived test line in waives.txt
references the correct NVBug URL matching the exact feature combo.
🪄 Autofix (Beta)
Fix all unresolved CodeRabbit comments on this PR:
- Push a commit to this branch (recommended)
- Create a new PR with the fixes
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📒 Files selected for processing (1)
tests/integration/test_lists/waives.txt
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PR_Github #51577 [ reuse-pipeline ] triggered by Bot. Commit: |
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PR_Github #51577 [ reuse-pipeline ] completed with state |
Auto-generated Waive PR
Created by: TensorRT LLM CI Report (requested by qa@nvidia.com)
Target branch:
mainBug(s): 6059036, 6075533, 6181383, 6211191, 6211193, 6211441, 6215689, 6224636, 6224637, 6240420, 6245279, 6245317, 6245389, 6245394
Waive entries added
Already waived (skipped)
test_e2e.py::test_openai_disagg_multi_nodes_completion_service_discovery[etcd]accuracy/test_llm_api_pytorch_multimodal.py::TestGemma3_27BInstruct::test_fp8_prequantizedaccuracy/test_llm_api_autodeploy.py::TestModelRegistryAccuracy::test_autodeploy_from_registry[google_gemma-3-1b-it-False]accuracy/test_llm_api_autodeploy.py::TestModelRegistryAccuracy::test_autodeploy_from_registry[mistralai_Ministral-8B-Instruct-2410-False]accuracy/test_llm_api_autodeploy.py::TestModelRegistryAccuracy::test_autodeploy_from_registry[nvidia_Llama-3.1-8B-Instruct-NVFP4-True]accuracy/test_llm_api_pytorch.py::TestMistralLarge3_675B::test_nvfp4_4gpus[latency_moe_trtllm]This PR was auto-generated by TensorRT LLM CI Report. Please review the waive entries before merging.
Summary by CodeRabbit